Ultra-low voltage large-scale integrated circuits (LSIs) in nano-scale technologies are needed both to meet the needs of a rapidly growing mobile cell phone market and to offset a significant increase in the power dissipation of high-end microprocessor units. The goal of this book is to provide a detailed explanation of the state-of-the-art nanometer and sub-1-V memory LSIs that are playing decisive roles in power conscious systems. Emerging problems between the device, circuit, and system levels are systematically discussed in terms of reliable high-speed operations of memory cells and peripheral logic circuits. The effectiveness of solutions at device and circuit levels is also described at length through clarifying noise components in an array, and even essential differences in ultra-low voltage operations between DRAMs and SRAMs.... using, 121 ultra-low voltage nano-scale, 119a147 voltage margin of the 6-T SRAM cell, 124a129 SRAM peripheral circuits ... see also separate entry variability issue in nanometer era voltage doubler, 237, 288a293, 332a333 circuit diagram, anbsp;...
|Title||:||Ultra-Low Voltage Nano-Scale Memories|
|Author||:||Kiyoo Itoh, Masashi Horiguchi, Hitoshi Tanaka|
|Publisher||:||Springer Science & Business Media - 2007-09-04|