Details timing analysis and optimization techniques for circuits with level-sensitive memory elements. This book contains a linear programming formulation applicable to the timing analysis of large scale circuits and includes a delay insertion methodology that improves the efficiency of clock skew scheduling.The operational constraints provide a system of equations defining the timing operation of a level-sensitive synchronous circuit. Different versions of the constraints presented in Sections 6.1.1, 6.1.2 and 6.1.3 have been used by designers inanbsp;...
|Title||:||Timing Optimization Through Clock Skew Scheduling|
|Author||:||Ivan S. Kourtev, Baris Taskin, Eby G. Friedman|
|Publisher||:||Springer Science & Business Media - 2008-11-16|