qFast advances in technology raise new challenges to physical design of integrated circuits and systems. High circuit density and increasing importance of battery-operated applications stress emphasis in system performances not only timing constraints but also power constraints to be considered at every stage of physical design. Regularly decreasing feature size leads to dense circuits in which high complexity combined with highly limited power dissipation must not sacrifice computational knowledge. The objective of this book is to provide a summary of important more recent research in this rapidly changing field. A major emphasis is put on modelling and characterisation mehtods allowing performance-driven design for advanced technologiesq--Back cover.The objective of this book is to provide a summary of important more recent research in this rapidly changing field.
|Title||:||Power and timing modelling for performance of integrated circuits|
|Author||:||Daniel Auvergne, Reiner Hartenstein|