MCMs today consist of complex and dense VLSI devices mounted into packages that allow little physical access to internal nodes. The complexity and cost associated with their test and diagnosis are major obstacles to their use. Multi-Chip Module Test Strategies presents state-of-the-art test strategies for MCMs. This volume of original research is designed for engineers interested in practical implementations of MCM test solutions and for designers looking for leading edge test and design-for-testability solutions for their next designs. Multi-Chip Module Test Strategies consists of eight contributions by leading researchers. It is designed to provide a comprehensive and well-balanced coverage of the MCM test domain. Multi-Chip Module Test Strategies has also been published as a special issue of the Journal of Electronic Testing: Theory and Applications (JETTA, Volume 10, Numbers 1 and 2).A parametric measurement unit on the tester verifies the part can provide the DC levels in the chip specification. ... challenge for test generation, because the mass of logic gates can be a large burden for simulation and automatic test pattern generation (ATPG) tools. ... Repair of assembly defects and replacement of faulty die will prevent having to discard an entire MCM because of one or two faults.
|Title||:||Multi-Chip Module Test Strategies|
|Publisher||:||Springer Science & Business Media - 2012-12-06|