In all cases, a local truncation error timestep control scheme is employed during the integration process. ... the speed and the accuracy of the time-domain analysis of partitioned large- scale digital circuits by Gauss-Seidel solution techniques. ... REFERENCES  L. W. Nagel, aquot;SPICE2: A Computer Program to Simulate Semiconductor Circuits, aquot; ERL Memo ai , No ... 1 - Usera#39;s Manual, aquot; Sandia Lab Report SAND 74-0441, 1975. ... IEEE Int. Symp. on Circuits and Systems, April 1980, pp.
|Title||:||IEEE International Conference on Circuits and Computers, ICCC 82|
|Author||:||IEEE Computer Society, Institute of Electrical and Electronics Engineers|