During the 1980s and early 1990s there was signi?cant work in the design and implementation of hardware neurocomputers. Nevertheless, most of these efforts may be judged to have been unsuccessful: at no time have have ha- ware neurocomputers been in wide use. This lack of success may be largely attributed to the fact that earlier work was almost entirely aimed at developing custom neurocomputers, based on ASIC technology, but for such niche - eas this technology was never suf?ciently developed or competitive enough to justify large-scale adoption. On the other hand, gate-arrays of the period m- tioned were never large enough nor fast enough for serious arti?cial-neur- network (ANN) applications. But technology has now improved: the capacity and performance of current FPGAs are such that they present a much more realistic alternative. Consequently neurocomputers based on FPGAs are now a much more practical proposition than they have been in the past. This book summarizes some work towards this goal and consists of 12 papers that were selected, after review, from a number of submissions. The book is nominally divided into three parts: Chapters 1 through 4 deal with foundational issues; Chapters 5 through 11 deal with a variety of implementations; and Chapter 12 looks at the lessons learned from a large-scale project and also reconsiders design issues in light of current and future technology.Summary of alternative designs considered for use in custom arithmetic VHDL libraries HDL Design Description uogfpadda IEEE ... floating-point pipelined parallel multiplier uogboothmultiplier 16-bit fixed-point shift-add multiplier based on Bootha#39;s algorithm (with carry ... logsig (i.e. sigmoid) function created using Xilinx LogiCORE Single Port Block Memory v4.0 * Based on VHDL source code dontatedanbsp;...
|Title||:||FPGA Implementations of Neural Networks|
|Author||:||Amos R. Omondi, Jagath C. Rajapakse|
|Publisher||:||Springer Science & Business Media - 2006-10-04|