FCCM presents recent work on the use of reconfigurable logic as computing elements. The proceedings focuses on topics such as device architecture, system architecture, compilation and programming tools, run time environments, nano technology, and applications.6.2 Service-Tag Architecture: Fair-queueing aamp; Priority-class service-Tag schedulers Area-Clock Rate Characteristics-virtex II 33792 (Virtex II ... The service-tag computation engine is not included, as we seek comparisons with the windowconstrained architecture. ... 1536 stream queues can be supported, while meeting the line-rates of 10Gbps links with 1500-byte Ethernet frames at 16 priority-levels.
|Author||:||Jeffrey M. Arnold, Kenneth L. Pocek|
|Publisher||:||Institute of Electrical & Electronics Engineers(IEEE) - 2004-01-01|