Figure 7 shows a 25 ns uniform jitter distribution of the latency (one clock source period) for asynchronous mode (sliding ... 1 in 23187a#39; .1 MS Figure 8 delsy(4 J] lou(C) 1 hightC) 1 range alt;Cagt; 1 signaCC) 1 736.65 ns 736.331 ns 736.963 ns 632. ... It entails an adjustment of the write pointer of the internal elastic FIFO buffer during the reset initialization phase. ... rate, the MGT device provides a large intrinsic jitter tolerance, suggesting that the Virtex-II Pro is a good solution for LHC.
|Title||:||European Council for Nuclear Research|