The book is divided into four major parts. Part I covers HDL constructs and synthesis of basic digital circuits. Part II provides an overview of embedded software development with the emphasis on low-level I/O access and drivers. Part III demonstrates the design and development of hardware and software for several complex I/O peripherals, including PS2 keyboard and mouse, a graphic video controller, an audio codec, and an SD (secure digital) card. Part IV provides three case studies of the integration of hardware accelerators, including a custom GCD (greatest common divisor) circuit, a Mandelbrot set fractal circuit, and an audio synthesizer based on DDFS (direct digital frequency synthesis) methodology. The book utilizes FPGA devices, Nios II soft-core processor, and development platform from Altera Co., which is one of the two main FPGA manufactures. Altera has a generous university program that provides free software and discounted prototyping boards for educational institutions (details at http://www.altera.com/university). The two main educational prototyping boards are known as DE1 ($99) and DE2 ($269). All experiments can be implemented and tested with these boards. A board combined with this book becomes a aturn-keya solution for the SoPC design experiments and projects. Most HDL and C codes in the book are device independent and can be adapted by other prototyping boards as long as a board has similar I/O configuration.... SOPC component construction tutorial 14.5.1 Avalon interfaces 14.5.2 Register map 14.5.3 Wrapped division circuit ... network 15.2.2 Timing consideration of off achip access 15.2.3 PLL Overview of SRAM 15.3.1 SRAM cell 15.3.2 Basicanbsp;...
|Title||:||Embedded SoPC Design with Nios II Processor and VHDL Examples|
|Author||:||Pong P. Chu|
|Publisher||:||John Wiley & Sons - 2011-09-26|