This book presents formal testplanning guidelines with examples focused on creating assertion-based verification IP. It demonstrates a systematic process for formal specification and formal testplanning, and also demonstrates effective use of assertions languages beyond the traditional language construct discussions Note that there many books published on assertion languages (such as SystemVerilog assertions and PSL). Yet, none of them discuss the important process of testplanning and using these languages to create verification IP. This is the first book published on this subject.6.2.3 Natural language properties Prior to creating a set of SystemVerilog interface assertions for our simple eight-client fair arbiter, we must first identify a comprehensive list of natural language properties, as shown in Table 6-2: Table 6-2anbsp;...
|Title||:||Creating Assertion-Based IP|
|Author||:||Harry D. Foster, Adam C. Krolnik|
|Publisher||:||Springer Science & Business Media - 2007-11-24|