The Controller Area Network (CAN), invented by Bosch in 1983, is a serial field bus protocol which was originally used in road vehicles and now is widely applied in other industrial fields. Since its birth automotive electronic engineers have been use Microcontrollers (MCU) to control the CAN bus. Today, as the Field-programmable Gate Array (FPGA) has become very advance, this book introduces a new method which uses an FPGA and a MCU jointly instead of a single MCU is to design a CAN bus measurement system. Furthermore the designed system should be able to work at the fastest possible speed. Chapter 1 of this book is the introduction which includes the background, objective and outline of this book. Chapter 2 describes the CAN protocol development history and fundamentals such as application field, architecture layers, different frame structures, frame coding, error handling and fault confinement which are extracted from the CAN Specification 2.0 and ISO 11898. It helps reader to understand the CAN. Chapter 3 studies the effective data transmission rate and ratio of the CAN bus and the MCU serial UART port. Then it compares their values and draws a conclusion. This chapter is the most important theory research of this book. Chapter 4 describes the devices used in the experiments of the book. There are five major devices applied: an Altera FPGA, a 5-3.3 V level translator, an Atmel CAN MCU, a NI CAN USB and a PC with LabVIEW environment. Chapter 5 demonstrates the software development procedure for the whole system including FPGA with Quartus II, MCU with Keil C51, and NI CAN BUS with LabVIEW. Chapter 6 describes the testing experiments of the measurement system. It analyses a common error ignored during the MCU programming and shows how to solve it. After the reprogramming, three tests and their results are illustrated. Chapter 7 presents the final conclusion of this book which is that the measurement system designed here maximally utilizes the CAN effective dataImplementation of a Can Bus Based Measurement System on an Fpga Development Kit Yu Zhu. Appendix. B: Figures. Fig. 1.1 System workflow chart . ... 28 Fig. 3.4 Common 8051 machine cycle structure .
|Title||:||Can and Fpga Communication Engineering|
|Publisher||:||Diplomica Verlag - 2010|