conversion between RSI 70 fields and 256 x 256 x 8 bit images). Input and ... Computations are pipelined between video-rate logic units on a MPS. as shown in Fig. 2. The logic units ... These graphs are then mapped onto space-time wiring diagrams which form the basis of the graphical programming environment of PIPE.
|Title||:||1987 Workshop on Computer Architecture for Pattern Analysis and Machine Intelligence, CAPAMI '87, October 5-7, 1987, Seattle, Washington|
|Author||:||IEEE Computer Society|
|Publisher||:||IEEE Computer Society Press - 1987-01-01|